- Trainer/in: Christian Chiarcos
Ziel dieser Veranstaltung ist die Vermittlung der Methoden und
Verfahren zur Scientific Visualization (Visualisierung von Meß- und
Simulationsdaten) und zur Informationsvisualisierung (Visualisierung von
strukturierten Informationen, z.B. Datenbankinhalten).
- Trainer/in: Daniel Schiffner
This course on computer architectures surveys mechanisms, trends and implementation techniques of today's microprocessors. It starts with the basic aspects of Hardware System Architecture (HSA) and Instruction Set Architecture (ISA) of well known techniques, continues with a comprehensive account of state-of-the-art techniques used in pipelining and concurrency of modern microprocessors. Special emphasis lies on the discussion of data dependencies, control and resource conflicts as well as speculative program execution. Microprocessors and Microcontrollers are the main cores in embedded systems and therefore a good knowledge of the state-of-the-art techniques is very important in many application domains.
This course gives an extended introduction to the technological constraints of microelectronics in computer architecture design. The main part of the course is dedicated to instruction, thread and task level parallelism of microprocessors that covers both the concepts and implementations in superscalar, VLIW, EPIC, multithreaded and multicore processors. The course ends with a discussion of memory management and hierachies.